Here are
37 public repositories
matching this topic...
🤖 SoCFPGA: Open-Source Embedded Linux Distribution with a highly flexible build system, developed for Intel (ALTERA) SoC-FPGAs (Cyclone V & Arria 10)
Updated
Oct 18, 2021
Python
DE10-Nano FPGA Configuration from Linux. Software to configure the FPGA portion of the Cyclone V SoC.
This is my bachelor's degree project. I have used a FPGA to modify audio signal and create different sounds, like distortion, overdrive, echo, reverb...
Intel Quartus Prime Synthesis Engine for Docker
Updated
Jul 31, 2022
Dockerfile
Yocto Project BSP meta-layer for Intel (ALTERA) SoC-FPGAs (SoCFPGA) - with step by step guide
Updated
Aug 29, 2022
BitBake
DE10 NANO SHA3-256 Proof of Work Miner
Demonstration how to build a Management Web interface to interact with the FPGA fabric and change the FPGA configuration with the Django Framework
Updated
Jun 27, 2021
Python
Automatically create a NIOS II Eclipse Project with the latest FreeRTOS Version, the Intel hwlib and more...
Script to build the bootloader (u-boot) and bring all components to a bootable image for Intel (ALTERA) SoC-FPGAs
Updated
Oct 27, 2021
Python
Implementation of ChaCha20 for Cyclone V FPGA (DE10-nano) easily connectable to HPS (ARM processor)
Sends data from an ADC to a UART-USB interface
Updated
Feb 25, 2022
VHDL
A 32-bit RISC processor built in Verilog for CS 3220 Spring 2017
Updated
Apr 18, 2017
Verilog
Quartus Project and bash scripts to compile Linux designs for DE10 Nano
Updated
Jun 3, 2020
Python
C++ examples for accessing FPGA Soft-IP and Hard-IP with embedded Linux for Intel (ALTERA) SoC-FPGAs (Cyclone V)
Bare-Metal ARM Toolchains for Altera SoCFPGA and NXP LPC32xx targets
Updated
Jun 1, 2018
Shell
Division Algorithms in FPGAs
Updated
Nov 24, 2019
VHDL
Source Code of Yocto Layer for accessing FPGA Manager of the Intel (ALTERA) Cyclone V SoCFPGA
This repository contains Quartus projects using VHDL that can be used to learn the basics of language and FPGA or just simply in the projects. All the codes are written intentionally in very easy way so that one can actually understand the language. This repository was made to help beginners in the VHDL language or for people who are using FPGA for the first time. With a few codes, Python was also used to interface and control with PC.
Updated
Jul 19, 2021
VHDL
OpenCL wrapper for Intel's unique chip ID function built for the Cyclone V chip on the DE1-SoC board
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